это таки байты, а не биты. и цифры получены измерением. а значит - это вот прям из реальности, а не теории. как они получены? а?
Using either SSE or AVX code, the Sandy Bridge core is capable of loading 2x16 Bytes per cycle. At 3.1 GHz this puts the peak L1 DCache Read BW at 3.1*32=99.2 GB/s using 1 core.
The best observed cache read bandwidth values of ~91 GB/s are more than 90% of the peak bandwidth, which is both reasonable and expected.
Using both cores the maximum Turbo frequency drop leads to a peak Read BW of 2.8*64=179.2 GB/s.
Bandwidths for writes (in isolation) are 1/2 of the bandwidth for reads in each case.