ARM, RISC-V контроллеры

#define GPIO_PORT(gpio)                         ((gpio) >> 16)
#define GPIO_PIN(gpio)                          ((gpio) & 0xff)
#define GPIO_MUX(gpio)                          ((gpio >> 8) & 0xff)

#define P(mux, pin, port)                       (((mux) << 8) | (((port)-1) << 16) | ((pin) << 0) )
typedef enum {
    EMC_00 = P(0  , 0 , 4),
    EMC_01 = P(1  , 1 , 4),
    EMC_02 = P(2  , 2 , 4),
    EMC_03 = P(3  , 3 , 4),
    EMC_04 = P(4  , 4 , 4),
    EMC_05 = P(5  , 5 , 4),
    EMC_06 = P(6  , 6 , 4),
    EMC_07 = P(7  , 7 , 4),
    EMC_08 = P(8  , 8 , 4),
    EMC_09 = P(9  , 9 , 4),
................................
    AD_B0_00 = P(42 , 0 , 1),
    AD_B0_01 = P(43 , 1 , 1),
    AD_B0_02 = P(44 , 2 , 1),
    AD_B0_03 = P(45 , 3 , 1),
    AD_B0_04 = P(46 , 4 , 1),
    AD_B0_05 = P(47 , 5 , 1),
    AD_B0_06 = P(48 , 6 , 1),
    AD_B0_07 = P(49 , 7 , 1),
    AD_B0_08 = P(50 , 8 , 1),
    AD_B0_09 = P(51 , 9 , 1),
.....................
}

#define GPIO_DSE_HIZ                            (0x0 << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)
#define GPIO_DSE_150                            (0x1 << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT) // R0 = 150 @ 3v3, 260 @ 1v8
#define GPIO_DSE_75                             (0x2 << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT) // R0 / 2
#define GPIO_DSE_50                             (0x3 << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT) // R0 / 3
#define GPIO_DSE_37                             (0x4 << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)
#define GPIO_DSE_30                             (0x5 << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)
#define GPIO_DSE_25                             (0x6 << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)
#define GPIO_DSE_21                             (0x7 << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT) // R0 / 7

#define GPIO_PD_100K                            (0x0 << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)
#define GPIO_PU_47K                             (0x1 << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)
#define GPIO_PU_100K                            (0x2 << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)
#define GPIO_PU_22K                             (0x3 << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)

#define GPIO_SPEED_LOW                          (0x0 << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT) // 50M
#define GPIO_SPEED_MEDIUM                       (0x1 << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT) // 100M
#define GPIO_SPEED_FAST                         (0x2 << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT) // 150M
#define GPIO_SPEED_MAX                          (0x3 << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT) // 200M

#define GPIO_HYST_DIS                           (0x0 << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)
#define GPIO_HYST_EN                            (0x1 << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)

#define GPIO_HYST_DIS                           (0x0 << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)
#define GPIO_HYST_EN                            (0x1 << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)

#define GPIO_OD_DIS                             (0x0 << IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT)
#define GPIO_OD_EN                              (0x1 << IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT)

#define GPIO_PULL_DIS                           (0x0 << 12)
#define GPIO_PULL_KEEPER                        (0x1 << 12)
#define GPIO_PULL_EN                            (0x3 << 12)

#define GPIO_DIR_IN                             (0x0 << 31)
#define GPIO_DIR_OUT                            (0x1 << 31)


const GPIO_Type_P GPIO[]={GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO1, GPIO2, GPIO3, GPIO4, GPIO10};
void imxrt_pin_enable(unsigned int pin, unsigned int mode, AF af)
{
    if(mode & (1 << 31))
        GPIO[GPIO_PORT(pin)]->GDIR |= 1 << GPIO_PIN(pin);
    else
        GPIO[GPIO_PORT(pin)]->GDIR &= ~(1 << GPIO_PIN(pin));
    IOMUXC->SW_MUX_CTL_PAD[GPIO_MUX(pin)] = af;
    IOMUXC->SW_PAD_CTL_PAD[GPIO_MUX(pin)] = mode & 0xffff;
}

void gpio_enable_pin(unsigned int pin, GPIO_MODE mode)
{
    switch (mode)
    {
    case GPIO_MODE_OUT:
        pin_enable(pin, GPIO_DEF_PAD_CTRL | GPIO_DIR_OUT, AF5);
        break;
    case GPIO_MODE_IN_FLOAT:
        pin_enable(pin, GPIO_DIR_IN| GPIO_HYST_EN | GPIO_PULL_DIS, AF5);
        break;
    case GPIO_MODE_IN_PULLUP:
        pin_enable(pin, GPIO_DIR_IN| GPIO_HYST_EN | GPIO_PULL_EN| GPIO_PU_47K, AF5);
        break;
    case GPIO_MODE_IN_PULLDOWN:
        pin_enable(pin, GPIO_DIR_IN| GPIO_HYST_EN | GPIO_PULL_EN| GPIO_PD_100K, AF5);
        break;
    }

}