Микроконтроллеры

static const sch_timers_pool_t  sch_timers_pool[SCH_TIMERS_SIZE] = 
{
    { SCH_TIMER1, SCH_TIMER1_RCC, SCH_TIMER1_IRQ},
    { SCH_TIMER2, SCH_TIMER2_RCC, SCH_TIMER2_IRQ},
    { SCH_TIMER3, SCH_TIMER3_RCC, SCH_TIMER3_IRQ},
    { SCH_TIMER4, SCH_TIMER4_RCC, SCH_TIMER4_IRQ},
};

init 
for (uint8_t i = 0; i < SCH_TIMERS_SIZE; i ++)
    {
        tmr_reset(sch_timers_pool[i].tmr);
        crm_periph_clock_enable(sch_timers_pool[i].tmr_rcc, TRUE);
        
        sch_timers_pool[i].tmr->ctrl1_bit.clkdiv = TMR_CLOCK_DIV4;
        sch_timers_pool[i].tmr->div = (DIV_TO_1mS(clk.apb1_freq));
        sch_timers_pool[i].tmr->pr = SCH_TIMER_OVF;
       
        sch_timers_pool[i].tmr->ctrl1_bit.tmren = 0;
      
        nvic_irq_enable(sch_timers_pool[i].tmr_irq, SCH_TIMER_PRE, SCH_TIMER_PRI);
    }