caxapa.ru :: На сайте WCH усть примеры для каждого семейства. Вот такое содержимое для 003. Такой наборчик и получил с ALI сегодня. Отдал 1450 с пересылкой. Заказал потому что WCH-linkE в комплекте.

Гyдвин, волшебник (14.06.2023 21:26, просмотров: 230) ответил Eddy_Em на А под них нет набора сниппетов - как у ST под STM32F0?

На сайте WCH усть примеры для каждого семейства. Вот такое содержимое для 003. Такой наборчик и получил с ALI сегодня. Отдал 1450 с пересылкой. Заказал потому что WCH-linkE в комплекте.

Nanjing Qinheng Microelectronics Co., Ltd. 2022.08
http://wch-ic.com
Directory
  |
  |-- CH32V00x: RISC-V MCU
  |      |-- EVT: CH32V00xEVT Evaluation Board and CH32V00x related software routines
  |      |      |-- PUB: 
  |      |      |      |-- CH32V00xEVT Evaluation Board Manual.pdf: CH32V00xEVT evaluation board introduction and project creation description
  |      |      |      |-- CH32V00xSCH.pdf: Schematic of CH32V00xEVT evaluation board
  |      |      |-- EXAM: 
  |      |      |      |-- SRC  
  |      |      |      |      |-- Core: kernal system header file
  |      |      |      |      |-- Debug: delay fuction, UART debugging source file and header file
  |      |      |      |      |-- Ld: ld file  
  |      |      |      |      |-- Peripheral: basic peripheral driver source file and header file
  |      |      |      |      |-- Startup: startup file. 
  |      |      |      |-- ADC
  |      |      |      |      |-- ADC_DMA: ADC DMA sampling routines
  |      |      |      |      |-- AnalogWatchdog: analog watchdog routine
  |      |      |      |      |-- Auto_Injection: automatic injection mode routine
  |      |      |      |      |-- Discontinuous_mode: discontinuous mode routine
  |      |      |      |      |-- ExtLines_Trigger: external lines trigger ADC conversion routine
  |      |      |      |-- DMA
  |      |      |      |      |-- DMA_MEM2MEM: Memory to memory mode routine
  |      |      |      |      |-- DMA_MEM2PERIP: Memory to peripheral mode, and peripheral to memory mode routine, see peripheral sub-routines
  |      |      |      |-- EXTI
  |      |      |      |      |-- EXTI0: external interrupt line routine
  |      |      |      |-- FLASH
  |      |      |      |      |-- FLASH_Program: FLASH erase/read/write, and fast programming  
  |      |      |      |-- GPIO 
  |      |      |      |      |-- GPIO_Toggle: GPIO routine 
  |      |      |      |-- I2C
  |      |      |      |      |-- I2C_7bit_Mode: 7-bit addressing mode, master/slave mode, transceiver routine
  |      |      |      |      |-- I2C_10bit_Mode: 10-bit addressing mode, master/slave mode transceiver routine
  |      |      |      |      |-- I2C_DMA: I2C DMA, master/slave mode transceiver routine
  |      |      |      |      |-- I2C_EEPROM: I2C interface routine to operate EEPROM peripheral 
  |      |      |      |      |-- I2C_PEC: PEC error check, master/slave mode transceiver routine 
  |      |      |      |-- IAP
  |      |      |      |      |-- V00x_APPú║APP go to IAP routine    
  |      |      |      |-- IWDG
  |      |      |      |      |-- IWDG: independent watchdog routine
  |      |      |      |-- OPA 
  |      |      |      |      |-- OPA: OPA as voltage follower output routine 
  |      |      |      |-- PWR
  |      |      |      |      |-- Sleep_Mode: low power, sleep mode routine
  |      |      |      |      |-- Standby_Mode: low power, standby mode routine
  |      |      |      |-- RCC
  |      |      |      |      |-- Get_CLKú║Get system-HCLK-AHB1-AHB2 clock routine   
  |      |      |      |      |-- MCO: MCO pin clock output routine      
  |      |      |      |-- SPI
  |      |      |      |      |-- 1Lines_half-duplex: single wire half duplex mode, master/slave mode, data transceiver
  |      |      |      |      |-- 2Lines_FullDuplex: two-wire full duplex mode, master/slave mode, data transceiver
  |      |      |      |      |-- FullDuplex_HardNSS: Hardware NSS mode, master/slave mode, data transceiver
  |      |      |      |      |-- SPI_CRC: CRC error check and master/slave mode transceiver routine
  |      |      |      |      |-- SPI_DMA: SPI DMA, master/slave mode transceiver routine
  |      |      |      |-- SYSTICK
  |      |      |      |      |-- SYSTICK_Interruptú║systick interrupt routine  
  |      |      |      |-- TIM
  |      |      |      |      |-- Clock_Select: clock source selection routine
  |      |      |      |      |-- ComplementaryOutput_DeadTime: complementary output and deadband insertion mode routines
  |      |      |      |      |-- ExtTrigger_Start_Two_Timer: external trigger routines to start two timers synchronously
  |      |      |      |      |-- Input_Capture: input capture routine
  |      |      |      |      |-- One_Pulse: single pulse output routine
  |      |      |      |      |-- Output_Compare_Mode: output comparison mode routine
  |      |      |      |      |-- PWM_Output: PWM output routine
  |      |      |      |      |-- Synchro_ExtTriggerú║slave mode routine, including reset mode, gating mode and trigger mode
  |      |      |      |      |-- Synchro_Timerú║timer synchronization mode
  |      |      |      |      |-- TIM_DMA: timer DMA routines
  |      |      |      |-- USART
  |      |      |      |      |-- USART_DMA: USART DMA, master/slave mode transceiver routine
  |      |      |      |      |-- USART_HalfDuplex: single wire half duplex mode, master/slave mode transceiver routine
  |      |      |      |      |-- USART_HardwareFlowControl: hardware flow control mode, master/slave mode, transceiver routine
  |      |      |      |      |-- USART_Interrupt: USART interrupt routine, master/slave mode transceiver routine
  |      |      |      |      |-- USART_MultiProcessorCommunication: multiprocessor communication mode routine
  |      |      |      |      |-- USART_Polling: polling transceiver mode, master/slave transceiver routine
  |      |      |      |      |-- USART_Printf: USART Print debugging routine
  |      |      |      |      |-- USART_SynchronousMode: synchronous mode, master/slave mode, transceiver routine    
  |      |      |      |-- WWDG: 
  |      |      |      |      |-- WWDG: window watchdog routine

Ответить

- С Ривер Студио идут процедуры работы с устройствами. Когда генерится проект, студия распаковывает заготовку проекта под нужную микросхему. В директории "Перифериаль" лежат и *.х, и *.ц файлы под каждое устройство. Предлагаемая структура достаточно уёбищная, но менять лень, пусть будет. - mse homjak(14.06.2023 22:51)
- Спасибо. Тоже заказал, чтобы было. Возможно понадобиться в обозримом будущем. - Nikolay_Po(14.06.2023 22:23)
- Спасибо. Eddy_Em(348 знак., 14.06.2023 21:34)
  - для других МК у WCH именно что свой вариант SPL - AlexG(14.06.2023 22:50)
    - Не, я такое не пользую. У меня свои сниппеты поверх CMSIS. - Eddy_Em(14.06.2023 23:13)

ARM, RISC-V контроллеры