ARM, RISC-V контроллеры

The EOC bit is set in the ADC_SR register:

• At the end of each regular group sequence if the EOCS bit is cleared to 0

• At the end of each regular channel conversion if the EOCS bit is set to 1

DMA спешит на помощь:

Since converted regular channel values are stored into a unique data register, it is useful to

use DMA for conversion of more than one regular channel. This avoids the loss of the data

already stored in the ADC_DR register.