ARM, RISC-V контроллеры

Functional Deviations of LPC2214 IAP.1:
    Flash memory programming interface timing problem
Introduction:
    The Flash memory on the LPC2214 offers In-Application
    Programming (IAP) functionality. The IAP routines are part of
    the on-chip boot loader software, which controls the interface
    between the digital logic and the Flash memory. Please note
    that all programming methods (JTAG, ISP, IAP) use IAP calls.
Problem:
    Due to a timing problem in the interface between the Flash
    block and the digital logic the following problem may occur:
     - If the boot loader revision in the device is previous to
       V1.63 then in up to 10% of the devices the Flash memory
       interface, at some point during an IAP programming or
       erase operation, may never return from the IAP call.
       Please note that devices that pass the IAP programming
       are functional and do not suffer from any long-term
       reliability problems.
     - Devices with a date code prior to 0424 (manufactured
       before week 24 in 2004) are generally affected by this
       problem unless you receive devices with updated boot
       loader software from your distributor. Parts marked with
       date code 0424 or later are not affected by this problem.
       Please refer to page 2 of this document for details on
       how to identify the date code.
Workarounds:
    1) The on-chip boot-loader software can be updated via ISP to
       correct this issue. The boot loader update files can be
       downloaded here: http://www.semiconductors.philips.com/
       files/products/standard/microcontrollers/utilities/
       lpc2000_bl_update.zip The boot-loader version can be read
       out using the Philips Flash ISP Utility which can be found
       here: http://www.semicon …ps.com/files/products/
       standard/microcontrollers/utilities/
       lpc2000_flash_utility.zip
       Both links can also be found on the product information
       page for this product under the Support & Tools section
       which can be found here: http://www.semiconductors.philips.
       com/pip/LPC2214FBD144.html
    2) Limiting the external clock frequency to 12 MHz AND making
       sure the on-chip PLL is turned OFF while programming any
       part of the Flash memory reduces the likelihood of the
       occurrence significantly. During In-System-Programming the
       PLL is turned off by default.
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