If flash address A0 is connected to the CPU bus address A1, A1->A2 etc. the code should be something like this:
<c>
#define NOR_FLASH_BASE_ADDR 0x80000000
#define make_flash_addr(addr) \
(volatile unsigned short *)(NOR_FLASH_BASE_ADDR | ((addr)<<1))
//----------------------------------------------------------------------------
int df_chk_flash_ic(void)
{
TN_INTSAVE_DATA
unsigned short Vendor_ID;
unsigned short Device_ID;
unsigned long ReturnStatus;
volatile int i;
unsigned short * ptr;
volatile unsigned short * addr;
tn_disable_interrupt();
// Issue Software ID Entry command to SST39VF320X
addr = make_flash_addr(0x5555);
*addr = 0x00AA; // 1st write data 0x00AA to device addr 5555H
addr = make_flash_addr(0x2AAA);
*addr = 0x0055; // 2nd write data 0x0055 to device addr 2AAAH
addr = make_flash_addr(0x5555);
*addr = 0x0090; // 3rd write data 0x0090 to device addr 5555H
for(i=0;i<70;i++); // delay for SST39VF320X
addr = make_flash_addr(0);
Vendor_ID = *addr;
addr = make_flash_addr(1);
Device_ID = *addr;
ReturnStatus = (Vendor_ID << 16) | Device_ID;
// Issue Software ID Exit command to put SST39VF320X into normal read mode.
addr = make_flash_addr(0x5555);
*addr = 0x00AA; // 1st write data 0x00AA to device addr 5555H
addr = make_flash_addr(0x2AAA);
*addr = 0x0055; // 2nd write data 0x0055 to device addr 2AAAH
addr = make_flash_addr(0x5555);
*addr = 0x00F0; // 3rd write data 0x00F0 to device addr 5555H
tn_enable_interrupt();
for(i=0;i<70;i++); // delay for SST39VF320X
if(ReturnStatus == 0x00BF235B) // 0x00BF235B for SST39VF3201 // 0x00BF235A SST39VF3202,
return ERR_NO_ERR;
return ERR_BAD_FLASH_INFO;
}
<c/>
P.S: Sorry for the english - no russian keyboard at the moment.
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- Спасибо. Да я об этом не подумал. С разницей в один в адресе читается одинаково флеш. Значит А0->А1. sat_art(106 знак., 04.04.2011 00:38)MBedder