Мобильная и беспроводная связь

Вопрос про cc1101. А как прикрутить CRC к пакету фиксированной длинны и как в ASK ловить окончание пакета фиксированной длинны??? Сам ниасилю! Спсб. перелаётся 16,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 Принимается: Причём CRC включен и автофлющ стоит!

MS=4A00 FIFO=CA657FFFAB583467156CE3F860715ECC450C MS=4A4A FIFO=CA657FFFAB583467156CE3F860715ECC450C MS=4A00 FIFO=CA657FFFAB583467156CE3F860715ECC450C MS=4A4A FIFO=CA657FFFAB583467156CE3F860715ECC450C MS=4A4A FIFO=CA657FFFAB583467156CE3F860715ECC450C MS=4A00 FIFO=CA657FFFAB583467156CE3F860715ECC450C MS=6A6A FIFO=CA657FFFAB583467156CE3F860715ECC450C MS=4A4A FIFO=CA657FFFAB583467156CE3F860715ECC450C MS=4A6A FIFO=CA657FFFAB657FFFAB583467156CE3F86071 MS=6A20 FIFO=CA657FFFAB583467156CE3F860715ECC450C MS= PKTSTATUS hh во время приёма ll по окончании.

Конфигурация. unsigned char __flash RF_SETTINGS[] = { 0x07, // IOCFG2 GDO2 Output Pin Configuration CHIP_RDYn 0x2E, // IOCFG1 GDO1 Output Pin Configuration Asserts when a packet has been received with CRC OK. De-asserts when the first byte is read from the RX FIFO 0x2E, // IOCFG0 GDO0 Output Pin Configuration RX FIFO has overflowed. 0x07, // FIFOTHR RX FIFO 32 and TX FIFO 33 Thresholds 0xD3, // SYNC1 Sync Word, High Byte 0x91, // SYNC0 Sync Word, Low Byte 16, // PKTLEN Packet Length ( (1<<5) | (1<<3) | (1<<2) | (0<<0)), // PKTCTRL1/ a sync word is always accepted | CRC_AUTOFLUSH | APPEND_STATUS | No address check ( (1<<6) | (0<<4) | (1<<2) | (0<<0)), // PKTCTRL0 (whitening) (PKT_FORMAT=use FIFO) (CRC=on) (LENGTH_CONFIG=Fixed) 0x00, // ADDR Device Address= broadcat 0xC5, // CHANNR Channel Number 0x06, // FSCTRL1 Frequency Synthesizer Control 0x00, // FSCTRL0 Frequency Synthesizer Control 0x10, // FREQ2 Frequency Control Word, High Byte 0x89, // FREQ1 Frequency Control Word, Middle Byte 0xD8, // FREQ0 Frequency Control Word, Low Byte 0xF5, // MDMCFG4 Modem Configuration 0x83, // MDMCFG3 Modem Configuration ( (0<<7) | (3<<4) | (1<<3) | (5<<0)),//0x30, // MDMCFG2 OOK No preamble/sync 0x80, // MDMCFG1 FEC_EN 0x00, // MDMCFG0 Modem Configuration 0x15, // DEVIATN Modem Deviation Setting ((0<<4) | (0<<3) | (7<<0)), // MCSM2 Main Radio Control State Machine Configuration ((1<<4) | (0<<2) | (0<<1)), // MCSM1 TX фсекда, Stay in calibr, TXOFF_MODE=rx ((1<<4) | (2<<2) | (0<<1) | (0<<0)), // MCSM0 FS_AUTOCAL = none PO_TIMEOUT=2 0x14, // FOCCFG Frequency Offset Compensation Configuration 0x6C, // BSCFG Bit Synchronization Configuration 0x03, // AGCCTRL2 AGC Control ((1<<6) | (1<<4) | (0<<0) ), //0x40, // AGCCTRL1 AGC Control 0x92, // AGCCTRL0 AGC Control 0x87, // WOREVT1 High Byte Event0 Timeout 0x6B, // WOREVT0 Low Byte Event0 Timeout 0xFB, // WORCTRL Wake On Radio Control 0x56, // FREND1 Front End RX Configuration 0x17, // FREND0 Front End TX Configuration 0xE9, // FSCAL3 Frequency Synthesizer Calibration 0x2A, // FSCAL2 Frequency Synthesizer Calibration 0x00, // FSCAL1 Frequency Synthesizer Calibration 0x1F, // FSCAL0 Frequency Synthesizer Calibration 0x41, // RCCTRL1 RC Oscillator Configuration 0x00, // RCCTRL0 RC Oscillator Configuration 0x59, // FSTEST Frequency Synthesizer Calibration Control 0x7F, // PTEST Production Test 0x3F, // AGCTEST AGC Test 0x81, // TEST2 Various Test Settings 0x35, // TEST1 Various Test Settings 0x0B, // TEST0 Various Test Settings 0x00, // PARTNUM Chip ID 0x04, // VERSION Chip ID 0x00, // FREQEST Frequency Offset Estimate from Demodulator 0x00, // LQI Demodulator Estimate for Link Quality 0x00, // RSSI Received Signal Strength Indication 0x00, // MARCSTATE Main Radio Control State Machine State 0x00, // WORTIME1 High Byte of WOR Time 0x00, // WORTIME0 Low Byte of WOR Time 0x00, // PKTSTATUS Current GDOx Status and Packet Status 0x00, // VCO_VC_DAC Current Setting from PLL Calibration Module 0x00, // TXBYTES Underflow and Number of Bytes 0x00, // RXBYTES Overflow and Number of Bytes 0x00, // RCCTRL1_STATUS Last RC Oscillator Calibration Result 0x00 // RCCTRL0_STATUS Last RC Oscillator Calibration Result }; unsigned char __flash PATABLE_DATA[] = { 0x00, // 0x12, // 0x0E, // 0x34, // 0x60, // 0xC5, // 0xC1, // 0xC0 // };