ВходНаше всё Теги codebook 无线电组件 Поиск Опросы Закон Воскресенье
24 ноября
26545 Топик полностью
Bill (18.04.2005 21:54, просмотров: 1) ответил vasiliy555 на Ответ: ну не правда
Честно говоря с AT89 сталкиваться не приходилось. Я просто по аналогии с AT90 (AVR). Slave Mode When the SPI is configured as a Slave, the Slave Select (SS) pin is always input. When SS is held low, the SPI is activated, and MISO becomes an output if configured so by the user. All other pins are inputs. When SS is driven high, all pins are inputs, and the SPI is passive, which means that it will not receive incoming data. Note that the SPI logic will be reset once the SS pin is driven high. The SS pin is useful for packet/byte synchronization to keep the Slave bit counter synchronous with the master clock generator. When the SS pin is driven high, the SPI Slave will immediately reset the send and receive logic, and drop any partially received data in the Shift Register. И маленький фрагмент кода из DS. Хоть и на ассемблере, но думаю, будет понятно
SPI_SlaveInit:
     ldi r17,(1<