Я и так делал. То же самое.
.cseg
.org 0x0000
;====== INTERRUPT VECTORS ================================================
jmp RESET ; Reset Handler
jmp EXT_INT0 ; IRQ0 Handler
jmp EXT_INT1 ; IRQ1 Handler
jmp EXT_INT2 ; IRQ2 Handler
jmp TIMER2_COMP ; Timer2 Compare Handler
jmp TIMER2_OVF ; Timer2 Overflow Handler
jmp TIMER1_CAPT ; Timer1 Capture Handler
jmp TIMER1_COMPA ; Timer1 CompareA Handler
jmp TIMER1_COMPB ; Timer1 CompareB Handler
jmp TIMER1_OVF ; Timer1 Overflow Handler
jmp TIMER0_COMP ; Timer0 Compare Handler
jmp TIMER0_OVF ; Timer0 Overflow Handler
jmp SPI_STC ; SPI Transfer Complete Handler
jmp USART_RXC ; USART RX Complete Handler
jmp USART_UDRE ; UDR Empty Handler
jmp USART_TXC ; USART TX Complete Handler
jmp ADC_COMPLETE ; ADC Conversion Complete Handler
jmp EE_RDY ; EEPROM Ready Handler
jmp ANA_COMP ; Analog Comparator Handler
jmp TWI ; Two-wire Serial Interface Handler
jmp SPM_RDY ; Store Program Memory Ready Handler
;-------------------------------------------------------------------------
.org INT_VECTORS_SIZE ; size in words
;=========================================================================
;=========================================================================
;RESET:
; reti
;EXT_INT0:
; reti
EXT_INT1: ; IRQ1 Handler
reti
EXT_INT2: ; IRQ2 Handler
reti
;TIMER2_COMP: ; Timer2 Compare Handler
; reti
TIMER2_OVF: ; Timer2 Overflow Handler
reti
TIMER1_CAPT: ; Timer1 Capture Handler
reti
TIMER1_COMPA: ; Timer1 CompareA Handler
reti
TIMER1_COMPB: ; Timer1 CompareB Handler
reti
TIMER1_OVF: ; Timer1 Overflow Handler
reti
;TIMER0_COMP: ; Timer0 Compare Handler
; reti
TIMER0_OVF: ; Timer0 Overflow Handler
reti
SPI_STC: ; SPI Transfer Complete Handler
reti
USART_RXC: ; USART RX Complete Handler
reti
USART_UDRE: ; UDR Empty Handler
reti
USART_TXC: ; USART TX Complete Handler
reti
ADC_COMPLETE: ; ADC Conversion Complete Handler
reti
EE_RDY: ; EEPROM Ready Handler
reti
ANA_COMP: ; Analog Comparator Handler
reti
TWI: ; Two-wire Serial Interface Handler
reti
SPM_RDY: ; Store Program Memory Ready Handler
reti
;=========================================================================