Микроконтроллеры

Ответ: 1. На С, как и на С++ я ничего кроме бенчмарка для сахары под 55хх не писал, а откомпилить отдельно асм-файл можно просто подключив его к проекту. 2. Не знаю есть ли они в библиотеке (в CSL должны быть), а вообще вот они (все мемори маппед автоматом композер знает если директиву .mmregs воткнуть):

URRBR:		.set	09C00h
URTHR:		.set	09C00h
_URDLL:		.set	09C00h
URIER:		.set	09C01h
_URDLM:		.set	09C01h
URIIR:		.set	09C02h
URFCR:		.set	09C02h
URLCR:		.set	09C03h
URMCR:		.set	09C04h
URLSR:		.set	09C05h
URSCR:		.set	09C07h
URDLL:		.set	09C08h
URDLM:		.set	09C09h
URPID1:		.set	09C0Ah
URPID2:		.set	09C0Bh
URPECR:		.set	09C0Ch


I2COAR:		.set	03c00h
I2CIER:		.set	03C01h
I2CSTR:		.set	03C02h
I2CCLKL:	.set	03C03h
I2CCLKH:	.set	03C04h
I2CCNT:		.set	03C05h
I2CDRR:		.set	03C06h
I2CSAR:		.set	03C07h
I2CDXR:		.set	03C08h
I2CMDR:		.set	03C09h
I2CISRC:	.set	03C0Ah
I2CGPIO:	.set	03C0Bh
I2CPSC:		.set	03C0Ch

XBSR:		.set	06c00h

PGPIOEN2:	.set	04406h
PGPIODIR2:	.set	04407h
PGPIODAT2:	.set	04408h

IODIR:		.set	03400h
IODATA:		.set	03401h

PLLCSR:		.set	01c80h
PLLM:		.set	01c88h
PLLDIV1:	.set	01c8ch
PLLDIV2:	.set	01c8eh
TSSR:		.set	08000h

GPTCTL1_1:	.set	02410h
GPTGCTL_1:	.set	02412h
GPTCLK_1:	.set	02403h
GPTPRD1_1:	.set	0240ch
GPTPRD2_1:	.set	0240dh
GPTPRD3_1:	.set	0240eh
GPTPRD4_1:	.set	0240fh
GPTCNT1_1:	.set	02408h
GPTCNT2_1:	.set	02409h
GPTCNT3_1:	.set	0240ah
GPTCNT4_1:	.set	0240bh

GPTCTL1_0:	.set	01010h
GPTGCTL_0:	.set	01012h
GPTCLK_0:	.set	01003h
GPTPRD1_0:	.set	0100ch
GPTPRD2_0:	.set	0100dh
GPTPRD3_0:	.set	0100eh
GPTPRD4_0:	.set	0100fh
GPTCNT1_0:	.set	01008h
GPTCNT2_0:	.set	01009h
GPTCNT3_0:	.set	0100ah
GPTCNT4_0:	.set	0100bh


DRR1_0:		.set	02800h
DRR2_0:		.set	02801h
DXR1_0:		.set	02802h
DXR2_0:		.set	02803h
SPCR1_0:	.set	02804h
SPCR2_0:	.set	02805h
RCR1_0:		.set	02806h
RCR2_0:		.set	02807h
XCR1_0:		.set	02808h
XCR2_0:		.set	02809h
SRGR1_0:	.set	0280Ah
SRGR2_0:	.set	0280Bh
MCR1_0:		.set	0280Ch
MCR2_0:		.set	0280Dh
RCERA_0:	.set	0280Eh
RCERB_0:	.set	0280Fh
XCERA_0:	.set	02810h
XCERB_0:	.set	02811h
PCR0:		.set	02812h

RCERC_0:	.set	02814h
RCERD_0:	.set	02815h
XCERC_0:	.set	02816h
XCERD_0:	.set	02817h
RCERE_0:	.set	02818h
RCERF_0:	.set	02819h
XCERE_0:	.set	0281ah
XCERF_0:	.set	0281bh
RCERG_0:	.set	0281ch
RCERH_0:	.set	0281dh
XCERG_0:	.set	0281eh
XCERH_0:	.set	0281fh

DRR1_1:		.set	02C00h
DRR2_1:		.set	02C01h
DXR1_1:		.set	02C02h
DXR2_1:		.set	02C03h
SPCR1_1:	.set	02C04h
SPCR2_1:	.set	02C05h
RCR1_1:		.set	02C06h
RCR2_1:		.set	02C07h
XCR1_1:		.set	02C08h
XCR2_1:		.set	02C09h
SRGR1_1:	.set	02C0Ah
SRGR2_1:	.set	02C0Bh
MCR1_1:		.set	02C0Ch
MCR2_1:		.set	02C0Dh
RCERA_1:	.set	02C0Eh
RCERB_1:	.set	02C0Fh
XCERA_1:	.set	02C10h
XCERB_1:	.set	02C11h
PCR1:		.set	02C12h
RCERC_1:	.set	02C14h
RCERD_1:	.set	02C15h
XCERC_1:	.set	02C16h
XCERD_1:	.set	02C17h
RCERE_1:	.set	02C18h
RCERF_1:	.set	02C19h
XCERE_1:	.set	02C1ah
XCERF_1:	.set	02C1bh
RCERG_1:	.set	02C1ch
RCERH_1:	.set	02C1dh
XCERG_1:	.set	02C1eh
XCERH_1:	.set	02C1fh

DMA_CSDP0:	.set	0C00h
DMA_CCR0:	.set	0C01h
DMA_CICR0:	.set	0C02h
DMA_CSR0:	.set	0C03h
DMA_CSSA_L0:	.set	0C04h
DMA_CSSA_U0:	.set	0C05h
DMA_CDSA_L0:	.set	0C06h
DMA_CDSA_U0:	.set	0C07h
DMA_CEN0:	.set	0C08h
DMA_CFN0:	.set	0C09h
DMA_CSFI0:	.set	0C0Ah
DMA_CSEI0:	.set	0C0Bh
DMA_CSAC0:	.set	0C0Ch
DMA_CDAC0:	.set	0C0Dh
DMA_CDEI0:	.set	0C0Eh
DMA_CDFI0:	.set	0C0Fh

DMA_CSDP1:	.set	0C20h
DMA_CCR1:	.set	0C21h
DMA_CICR1:	.set	0C22h
DMA_CSR1:	.set	0C23h
DMA_CSSA_L1:	.set	0C24h
DMA_CSSA_U1:	.set	0C25h
DMA_CDSA_L1:	.set	0C26h
DMA_CDSA_U1:	.set	0C27h
DMA_CEN1:	.set	0C28h
DMA_CFN1:	.set	0C29h
DMA_CSFI1:	.set	0C2Ah
DMA_CSEI1:	.set	0C2Bh
DMA_CSAC1:	.set	0C2Ch
DMA_CDAC1:	.set	0C2Dh
DMA_CDEI1:	.set	0C2Eh
DMA_CDFI1:	.set	0C2Fh

DMA_CSDP2:	.set	0C40h
DMA_CCR2:	.set	0C41h
DMA_CICR2:	.set	0C42h
DMA_CSR2:	.set	0C43h
DMA_CSSA_L2:	.set	0C44h
DMA_CSSA_U2:	.set	0C45h
DMA_CDSA_L2:	.set	0C46h
DMA_CDSA_U2:	.set	0C47h
DMA_CEN2:	.set	0C48h
DMA_CFN2:	.set	0C49h
DMA_CSFI2:	.set	0C4Ah
DMA_CSEI2:	.set	0C4Bh
DMA_CSAC2:	.set	0C4Ch
DMA_CDAC2:	.set	0C4Dh
DMA_CDEI2:	.set	0C4Eh
DMA_CDFI2:	.set	0C4Fh