ARM, RISC-V контроллеры

Дело не в уверенности. Желательно прочитать (если об этом уже написано). Н-р, для STM32F2 дело обстоит так >>  "MCO clock pins not compatible with Ethernet IEEE802.3 long term jitter specifications When the clock source output by the microcontroller on the MCO pin is issued from the PLL, the MCO pin cannot be used to deliver a RMII 50 MHz clock input or a MII 25 MHz clock input, as specified within the STM32F2xx PLL specifications. The main PLL limits the input frequency from 1 MHz up to 2 MHz using the PLLMx factor, introducing a long term jitter which is not compliant with restrictive IEEE802.3 specifications. This limitation applies both to MCO1 and MCO2 pins and PLLs"