ARM, RISC-V контроллеры

 


void AT91F_SetTwiClock(const AT91PS_TWI pTwi)
{
	int sclock;

	/* Here, CKDIV = 1 and CHDIV=CLDIV  ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6)*/

	sclock = (10*AT91C_MASTER_CLOCK /AT91C_TWI_CLOCK);
	if (sclock % 10 >= 5)
		sclock = (sclock /10) - 5;
	else
		sclock = (sclock /10)- 6;
	sclock = (sclock + (4 - sclock %4)) >> 2;	// div 4

    pTwi->TWI_CWGR	= 0x00010000 | sclock | (sclock << 8);
}


//************************************************************************************************

		
				//enable TWI GPIO

				AT91F_PIO_CfgPeriph(
						(AT91PS_PIO)AT91C_BASE_PIOA, 			// PIO controller base address
						((unsigned int) AT91C_PA25_TWD     ) |
						((unsigned int) AT91C_PA26_TWCK    ), // Peripheral A
						0); 				// Peripheral B
				
				AT91F_PIO_CfgOpendrain((AT91PS_PIO)AT91C_BASE_PIOA, (unsigned int) AT91C_PA25_TWD);

				
				// First, enable the clock of the PIO
				AT91F_PMC_EnablePeriphClock ( (AT91PS_PMC)AT91C_BASE_PMC, ((unsigned int) 1 << AT91C_ID_TWI) ) ;


				//configure TWI
				twi = ((AT91S_TWI*)AT91C_BASE_TWI);
				twi->TWI_IDR = 0x3ff;				/* Disable all interrupts */
				twi->TWI_CR = AT91C_TWI_SWRST;			/* Reset peripheral */
				twi->TWI_CR = AT91C_TWI_MSEN | AT91C_TWI_SVDIS;	/* Set Master mode */

				//================================= 
				//	twi->TWI_CWGR = 0xFFFFFFFF;	// slowest clock 

					// Set TWI Clock Waveform Generator Register	
				
				AT91F_SetTwiClock(twi);


				
				length = 9;			


	/* Set the TWI Master Mode Register */
	twi->TWI_MMR = ((RTC8564_ADDRESS << 16) | AT91C_TWI_IADRSZ_1_BYTE |  AT91C_TWI_MREAD);


	// Set TWI Internal Address Register
	twi->TWI_IADR = 0x0;
	
	// Start transfer
	twi->TWI_CR = AT91C_TWI_START;
	
	status = twi->TWI_SR;
		
	for(ii=0;iiTWI_SR & AT91C_TWI_RXRDY));

		// Read byte
		//*(data++) = twi->TWI_RHR;
		buffer[ii] = twi->TWI_RHR;
		//printf(" %x\r\n",data_read);
		
	}
	
	twi->TWI_CR = AT91C_TWI_STOP;

	status = twi->TWI_SR;

	// Wait transfer is finished
    	while (!(twi->TWI_SR & AT91C_TWI_TXCOMP));

	// Read last byte
	//*data = twi->TWI_RHR;
	buffer[ii] = twi->TWI_RHR;
	
	
	
	
	
	
	// Для записи
	
	
	
	// Set the TWI Master Mode Register
	twi->TWI_MMR = ( (RTC8564_ADDRESS << 16) | AT91C_TWI_IADRSZ_1_BYTE ) & ~AT91C_TWI_MREAD;	
	
	// Set TWI Internal Address Register
	twi->TWI_IADR = 0x0;

	status = twi->TWI_SR;
		
	twi->TWI_THR = buffer[0];	//*(data2send++);
	
	twi->TWI_CR = AT91C_TWI_START;
		
	
	for(ii=1;iiTWI_SR & AT91C_TWI_TXRDY));
		
			// Send first byte
			twi->TWI_THR = buffer[ii];//*(data2send++);
			}

		twi->TWI_CR = AT91C_TWI_STOP;		
	
		status = twi->TWI_SR;
	
		// Wait transfer is finished
	    	while (!(twi->TWI_SR & AT91C_TWI_TXCOMP));