ARM, RISC-V контроллеры

Thumb Instruction Reference
ARM DUI 0068A Copyright © 2000 ARM Limited. All rights reserved.

5.1.5 LDMIA and STMIA
Load and store multiple registers.
Syntax
op Rn!, {reglist}

where:
op is either:
LDMIA Load multiple, increment after
STMIA Store multiple, increment after.
Rn is the register containing the base address. Rn must be in the range r0-r7.
reglist is a comma-separated list of low registers or low-register ranges.
Note
The braces in the syntax description are part of the instruction format.
They do not indicate that the register list is optional.
There must be at least one register in the list.
Usage
Registers are loaded stored and in numerical order, with the lowest numbered register
at the address initially in Rn.
The value in Rn is incremented by 4 times the number of registers in reglist.
If Rn is in reglist:
• for an LDMIA instruction, the final value of Rn is the value loaded, not the incremented address
• for an STMIA instruction, the value stored for Rn is:
— the initial value of Rn if Rn is the lowest-numbered register in reglist
— unpredictable otherwise.
Architectures
These instructions are available in all T variants of the ARM architecture.

Thumb Instruction Reference

Examples
LDMIA r3!, {r0,r4}
LDMIA r5!, {r0-r7}
STMIA r0!, {r6,r7}
STMIA r3!, {r3,r5,r7}