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Ксения (28.09.2012 16:27 - 16:31, просмотров: 318) ответил Shura на нету там такого
High-Performance, Low-Power, TMS320C55x™ • Device USB Port With Integrated 2.0 http://www.ti.com/lit/ds/symlink/tms320c5515.pdf
Fixed-Point Digital Signal Processor High-Speed PHY that Supports: – 16.67-, 13.33-, 10-, 8.33-ns Instruction Cycle – USB 2.0 Full- and High-Speed Device Time • LCD Bridge With Asynchronous Interface – 60-, 75-, 100-, 120-MHz Clock Rate • Tightly-Coupled FFT Hardware Accelerator – One/Two Instruction(s) Executed per Cycle • 10-Bit 4-Input Successive Approximation (SAR) – Dual Multipliers [Up to 200 or 240 Million ADC Multiply-Accumulates per Second (MMACS)] • Real-Time Clock (RTC) With Crystal Input, With – Two Arithmetic/Logic Units (ALUs) Separate Clock Domain and Power Supply – Three Internal Data/Operand Read Buses • Four Core Isolated Power Supply Domains: and Two Internal Data/Operand Write Buses Analog, RTC, CPU and Peripherals, and USB – Software-Compatible With C55x Devices • Four I/O Isolated Power Supply Domains: RTC – Industrial Temperature Devices Available I/O, EMIF I/O, USB PHY, and DVDDIO • 320K Bytes Zero-Wait State On-Chip RAM, • Three integrated LDOs (DSP_LDO, ANA_LDO, Composed of: and USB_LDO) to power the isolated domains: – 64K Bytes of Dual-Access RAM (DARAM), DSP Core, Analog, and USB Core, respectively 8 Blocks of 4K x 16-Bit • Low-Power S/W Programmable Phase-Locked – 256K Bytes of Single-Access RAM (SARAM), Loop (PLL) Clock Generator 32 Blocks of 4K x 16-Bit • On-Chip ROM Bootloader (RBL) to Boot From • 128K Bytes of Zero Wait-State On-Chip ROM NAND Flash, NOR Flash, SPI EEPROM, SPI (4 Blocks of 16K x 16-Bit) Serial Flash or I2C EEPROM • 4M x 16-Bit Maximum Addressable External • IEEE-1149.1 (JTAG™) Memory Space (SDRAM/mSDRAM) Boundary-Scan-Compatible • 16-/8-Bit External Memory Interface (EMIF) with • Up to 26 General-Purpose I/O (GPIO) Pins Glueless Interface to: (Multiplexed With Other Device Functions) – 8-/16-Bit NAND Flash, 1- and 4-Bit ECC • 196-Terminal Pb-Free Plastic BGA (Ball Grid – 8-/16-Bit NOR Flash Array) (ZCH Suffix) – Asynchronous Static RAM (SRAM) • 1.05-V Core (60 or 75 MHz), 1.8-V, 2.5-V, 2.75-V, or 3.3-V I/Os – SDRAM/mSDRAM (1.8-, 2.5-, 2.75-, and 3.3-V)