ARM, RISC-V контроллеры

To: Vladimir Ljaschko и его Молодому коллеге В теме про sprintf в SDRAM, вы запускали отладку из внешней ОЗУ или из внутренней флеши 4357? Если из внешней то какой отладчик пользовали? Вторую неделю пытаюсь запустить отладку из внешней SDRAM с помощью JLink-а из под Иара. Mac-файл настройки переписал из примера к 4357 к этой памяти. Отладчик выдает: Mon Apr 29, 2013 17:07:37: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 6.5\arm\config\flashloader\NXP\LPC43xx_extRAM.mac Mon Apr 29, 2013 17:07:37: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\NXP\Trace_LPC18xx_LPC43xx.dmac Mon Apr 29, 2013 17:07:38: Logging to file: D:\Documents\ÌÊ\LPC43xx\LPC4300-demos\Examples\LCD_ExtSDRAM\EWARM\cspycomm.log Mon Apr 29, 2013 17:07:38: JLINK command: ProjectFile = D:\Documents\ÌÊ\LPC43xx\LPC4300-demos\Examples\LCD_ExtSDRAM\EWARM\settings\LCD_ExtSDRAM_LPC4350_IntSRAM.jlink, return = 0 Mon Apr 29, 2013 17:07:38: JLINK command: scriptfile = C:\Program Files\IAR Systems\Embedded Workbench 6.5\arm\config\debugger\NXP\LPC4350_DebugCortexM4.JLinkScript, return = 0 Mon Apr 29, 2013 17:07:38: Device "LPC4357_M4" selected (0 KB flash, 0 KB RAM). Mon Apr 29, 2013 17:07:38: DLL version: V4.56b, compiled Nov 7 2012 18:44:28 Mon Apr 29, 2013 17:07:38: Firmware: J-Link V9 compiled Jan 11 2013 12:33:03 Mon Apr 29, 2013 17:07:38: JTAG speed is using adaptive clocking (RTCK signal) Mon Apr 29, 2013 17:07:38: NXP LPC4350 (Cortex-M4+M0 core) J-Link script Mon Apr 29, 2013 17:07:38: TotalIRLen = 8, IRPrint = 0x0011 Mon Apr 29, 2013 17:07:38: J-Link script: Cortex-M0 already enabled. Mon Apr 29, 2013 17:07:38: TotalIRLen = 8, IRPrint = 0x0011 Mon Apr 29, 2013 17:07:38: Found Cortex-M4 r0p1, Little endian. Mon Apr 29, 2013 17:07:38: TPIU fitted. Mon Apr 29, 2013 17:07:38: ETM fitted. Mon Apr 29, 2013 17:07:38: FPUnit: 6 code (BP) slots and 2 literal slots Mon Apr 29, 2013 17:07:38: Found Cortex-M4 r0p1, Little endian. Mon Apr 29, 2013 17:07:38: TPIU fitted. Mon Apr 29, 2013 17:07:38: ETM fitted. Mon Apr 29, 2013 17:07:38: FPUnit: 6 code (BP) slots and 2 literal slots Mon Apr 29, 2013 17:07:38: Hardware reset with strategy 0 was performed Mon Apr 29, 2013 17:07:38: Initial reset was performed Mon Apr 29, 2013 17:07:38: Found 2 JTAG devices, Total IRLen = 8: Mon Apr 29, 2013 17:07:38: #0 Id: 0x4BA00477, IRLen: 4, IRPrint: 0x1 CoreSight JTAG-DP Mon Apr 29, 2013 17:07:38: #1 Id: 0x0BA01477, IRLen: 4, IRPrint: 0x1 CoreSight SW-DP Mon Apr 29, 2013 17:07:38: execUserPreload Mon Apr 29, 2013 17:07:39: not fail Mon Apr 29, 2013 17:07:39: execUserPreload Finish Mon Apr 29, 2013 17:07:39: 7820 bytes downloaded and verified (27.18 Kbytes/sec) Mon Apr 29, 2013 17:07:39: Warning: Verify error at address 0x28000001, target byte: 0x00, byte in file: 0x23 Mon Apr 29, 2013 17:07:39: Warning: ... много-много варнингов ... Mon Apr 29, 2013 17:07:39: Warning: Verify error at address 0x280000CD, target byte: 0xF7, byte in file: 0x1E Mon Apr 29, 2013 17:07:39: Warning: Too many verify errors, only the first 200 are displayed Mon Apr 29, 2013 17:07:40: Warning: There were warnings during download, see Log Window Mon Apr 29, 2013 17:07:40: Loaded debugee: D:\Documents\ÌÊ\LPC43xx\LPC4300-demos\Examples\LCD_ExtSDRAM\EWARM\LPC4350_IntSRAM\Exe\LCD_ExtSDRAM.out Mon Apr 29, 2013 17:07:43: Fatal error: Bad JTAG communication: Write to IR: Expected 0x1, got 0x0 (TAP Command : 10) @ Off 0x5. Wrong AHB ID (15:3). Expected 0x04770001 (Mask 0x0FFFFF0F), Found 0x00000000 Session aborted! Mon Apr 29, 2013 17:07:43: Target reset Mon Apr 29, 2013 17:07:43: Failed to load debugee: D:\Documents\ÌÊ\LPC43xx\LPC4300-demos\Examples\LCD_ExtSDRAM\EWARM\LPC4350_IntSRAM\Exe\LCD_ExtSDRAM.out