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 Unexpected DIV/DIVW instruction result in ISR
Description
In very specific conditions, a DIV/DIVW instruction may return a false result when executed 
inside an interrupt service routine (ISR). This error occurs when the DIV/DIVW instruction is 
interrupted and a second interrupt is generated during the execution of the IRET instruction 
of the first ISR. Under these conditions, the DIV/DIVW instruction executed inside the 
second ISR, including function calls, may return an unexpected result.
The applications that do not use the DIV/DIVW instruction within ISRs are not impacted.
Workaround 1
If an ISR or a function called by this routine contains a division operation, the following 
assembly code should be added inside the ISR before the DIV/DIVW instruction:
push cc
pop a
and a,#$BF
push a
pop cc
This sequence should be placed by C compilers at the beginning of the ISR using 
DIV/DIVW. Refer to your compiler documentation for details on the implementation and 
control of automatic or manual code insertion.