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28 ноября
531589
Механик08 (17.07.2014 13:34 - 14:03, просмотров: 3839)
Почему-то не сбрасывается счётчик watchdog таймера командой IWDG_KR = 0xAA; в stm8s-discovery (смотрю на осциллограф, а там постоянно возникает ресет)... Вот код программы (в IAR 1.40.1 оптимизация кода низкая): 
#include <iostm8S105c6.h>
#include <intrinsics.h>

//--------------------------------------------------------------------------------
//
//  Setup the system clock to run at 16MHz using the internal oscillator.
//
void InitialiseSystemClock()
{
    CLK_ICKR = 0;                       //  Reset the Internal Clock Register.
    CLK_ICKR_HSIEN = 1;                 //  Enable the HSI.
    CLK_ECKR = 0;                       //  Disable the external clock.
    while (CLK_ICKR_HSIRDY == 0);       //  Wait for the HSI to be ready for use.
    CLK_CKDIVR = 0;                     //  Ensure the clocks are running at full speed.
    CLK_PCKENR1 = 0xFF;                 //  Enable all peripheral clocks.
    CLK_PCKENR2 = 0xFF;                 //  
    CLK_CCOR = 0;                       //  Turn off CCO.
    CLK_HSITRIMR = 0;                   //  Turn off any HSIU trimming.
    CLK_SWIMCCR = 0;                    //  Set SWIM to run at clock / 2.
    CLK_SWR = 0xe1;                     //  Use HSI as the clock source.
    CLK_SWCR = 0;                       //  Reset the clock switch control register.
    CLK_SWCR_SWEN = 1;                  //  Enable switching.
    while (CLK_SWCR_SWBSY != 0);        //  Pause while the clock switch is busy.
}

void InitialisePorts()
{
    PD_ODR = 0;             //  All pins are turned off.
    PD_DDR = 0xff;          //  All pins are outputs.
    PD_CR1 = 0xff;          //  Push-Pull outputs.
    PD_CR2 = 0xff;          //  Output speeds up to 10 MHz.
}

void InitialiseIWDT()
{
  IWDG_KR = 0xCC; // key_enable IWDG (Watchdog Timer)
  IWDG_KR = 0x55; // key_access to IWDG_PR and IWDG_RLR (config prescaler)
  IWDG_PR = 0;
  IWDG_RLR = 0x0;
}

int main()
{
    InitialiseSystemClock();
    InitialisePorts();
    PD_ODR_ODR2 = 1;
    __no_operation();
    __no_operation();
    __no_operation();
    __no_operation();
    PD_ODR_ODR2 = 0;
    InitialiseIWDT();

    volatile int counter;
    while (1)
    {
       IWDG_KR = 0xAA; // refresh value of Watchdog counter
       counter++;
    }
}