ARM, RISC-V контроллеры

такой устроит? для кодека tlv320aic #include <includes.h> void TWI_IntHandler(void){ INT32U State = AT91C_BASE_TWI->TWI_SR; AT91F_DBGU_Printk("twi error\r\n"); if (State&AT91C_TWI_TXCOMP){ // tx complete. } if (State&AT91C_TWI_TXRDY){ // tx ready. } if (State&AT91C_TWI_RXRDY){ // rx ready. } if (State&AT91C_TWI_OVRE){ // overrun. } if (State&AT91C_TWI_UNRE){ // underrun. } if (State&AT91C_TWI_NACK){ // NACK. } AT91C_BASE_AIC->AIC_IVR = 0; /* Debug variant of IVR (protect mode is used)*/ AT91C_BASE_AIC->AIC_ICCR = AT91C_ID_TWI; /* Clear TWI interrupt */ AT91C_BASE_AIC->AIC_EOICR = 0; /* Signal end of interrupt */ } int TwiWrite(INT8U addr, INT8U reg, INT16U value){ // 7 bit - reg, 9 bit data AT91C_BASE_TWI->TWI_CR = AT91C_TWI_MSEN; // master enable AT91C_BASE_TWI->TWI_MMR = (addr << 16); // no internal address - byte protocol AT91C_BASE_TWI->TWI_THR = (reg<<1)|((value>>8)&1); AT91C_BASE_TWI->TWI_CR |= AT91C_TWI_START; while((AT91C_BASE_TWI->TWI_SR & AT91C_TWI_TXRDY) != AT91C_TWI_TXRDY){// wait for tx ready } AT91C_BASE_TWI->TWI_THR = (INT8U)value; while((AT91C_BASE_TWI->TWI_SR & AT91C_TWI_TXRDY) != AT91C_TWI_TXRDY){// wait for tx ready } AT91C_BASE_TWI->TWI_CR |= AT91C_TWI_STOP; while((AT91C_BASE_TWI->TWI_SR & AT91C_TWI_TXCOMP) != AT91C_TWI_TXCOMP){// wait for tx complete } if ((AT91C_BASE_TWI->TWI_SR & AT91C_TWI_NACK) == AT91C_TWI_NACK) return -1; return 0; } void TwiInit(void){ AT91F_TWI_CfgPMC(); AT91F_TWI_CfgPIO(); AT91F_TWI_Configure(AT91C_BASE_TWI); AT91C_BASE_TWI->TWI_CWGR = 0x0F0404; // clock /* AT91F_TWI_EnableIt(AT91C_BASE_TWI,AT91C_TWI_NACK|AT91C_TWI_OVRE|AT91C_TWI_UNRE); // int enabled AT91F_AIC_ConfigureIt (AT91C_BASE_AIC, AT91C_ID_TWI, TWI_IRQ_LEVEL, AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, TWI_IntHandler); AT91F_AIC_EnableIt (AT91C_BASE_AIC, AT91C_ID_TWI); */ AT91F_DBGU_Printk("twi open\r\n"); // OSTimeDlyHMSM(0, 0, 1, 0); }