Не-не-не. АЦП только выдаёт, поэтому используется Unidirectional receive-only procedure (BIDIMODE=0 and RXONLY=1)Причём биты в отладчике проверил, соответствуют.
Даже картинка есть под это дело!
/*!< SPI configuration */
SPI_Cmd(AD7767_SPIIF, DISABLE);
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_RxOnly; //1Line_Rx;
//SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(AD7767_SPIIF, &SPI_InitStructure);
In this mode, the procedure can be reduced as described below (see Figure 257): 1. Set the RXONLY bit in the SPI_CR2 register. 2. Enable the SPI by setting the SPE bit to 1: a) In master mode, this immediately activates the generation of the SCK clock, and data are serially received until the SPI is disabled (SPE=0). b) In slave mode, data are received when the SPI master device drives NSS low and generates the SCK clock. 3. Wait until RXNE=1 and read the SPI_DR register to get the received data (this clears the RXNE bit). Repeat this operation for each data item to be received. This procedure can also be implemented using dedicated interrupt subroutines launched at each rising edge of the RXNE flag.