Fixed: Ошибка в определениях ИАРа ver 7202. ИАР:
typedef struct SPI_MemMap {
uint8_t C1; /**< SPI control register 1, offset: 0x0 */
uint8_t C2; /**< SPI control register 2, offset: 0x1 */
uint8_t BR; /**< SPI baud rate register, offset: 0x2 */
uint8_t S; /**< SPI status register, offset: 0x3 */
uint8_t RESERVED_0[1];
uint8_t D; /**< SPI data register, offset: 0x5 */
uint8_t RESERVED_1[1];
uint8_t M; /**< SPI match register, offset: 0x7 */
} volatile *SPI_MemMapPtr;
Datasheet:
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4007_6000 SPI Status Register (SPI0_S) 8 R 20h 35.3.1/627
4007_6001 SPI Baud Rate Register (SPI0_BR) 8 R/W 00h 35.3.2/631
4007_6002 SPI Control Register 2 (SPI0_C2) 8 R/W 00h 35.3.3/632
4007_6003 SPI Control Register 1 (SPI0_C1) 8 R/W 04h 35.3.4/633
4007_6004 SPI Match Register low (SPI0_ML) 8 R/W 00h 35.3.5/635
4007_6005 SPI match register high (SPI0_MH) 8 R/W 00h 35.3.6/636
4007_6006 SPI Data Register low (SPI0_DL) 8 R/W 00h 35.3.7/636
4007_6007 SPI data register high (SPI0_DH) 8 R/W 00h 35.3.8/637
4007_600A SPI clear interrupt register (SPI0_CI) 8 R/W 00h 35.3.9/637
4007_600B SPI control register 3 (SPI0_C3) 8 R/W 00h
35.3.10/
639
4007_7000 SPI Status Register (SPI1_S) 8 R 20h 35.3.1/627