ARM, RISC-V контроллеры

The read protection Level 2 is activated by writing 0xCC to the RDP option byte. When the read protection Level 2 is set: – All protections provided by Level 1 are active. – Booting from RAM or system memory bootloader is no more allowed. – JTAG, SWV (single-wire viewer), ETM, and boundary scan are disabled. – User option bytes can no longer be changed. – When booting from Flash memory, accesses (read, erase and program) to Flash memory and backup SRAM from user code are allowed. Memory read protection Level 2 is an irreversible operation. When Level 2 is activated, the level of protection cannot be decreased to Level 0 or Level 1.