ARM, RISC-V контроллеры

NVIC_SetPriority(DMA1_Channel1_IRQn, 3);
NVIC_EnableIRQ(DMA1_Channel1_IRQn);
DMA1_Channel1->CNDTR = 2 * ADC_NCH;
DMA1_Channel1->CPAR = (int)&ADC1->DR;
DMA1_Channel1->CMAR = (int)buf;
DMA1_Channel1->CCR = DMA_CCR1_PSIZE_0
                   | DMA_CCR1_MSIZE_0
                   | DMA_CCR1_MINC
                   | DMA_CCR1_CIRC
                   | DMA_CCR1_HTIE
                   | DMA_CCR1_TCIE;
DMA1_Channel1->CCR = DMA_CCR1_PSIZE_0
                   | DMA_CCR1_MSIZE_0
                   | DMA_CCR1_MINC
                   | DMA_CCR1_CIRC
                   | DMA_CCR1_HTIE
                   | DMA_CCR1_TCIE;
                   | DMA_CCR1_EN;
ADC1->CR2 = ADC_CR2_ADON; // wake ADC
delay(1e-5 * TICKS_PER_SEC);
ADC1->CR2 |= ADC_CR2_CAL;
delay(1e-5 * TICKS_PER_SEC);
while (ADC1->CR2 & ADC_CR2_CAL) ; // wait for calibration
ADC1->CR1 = ADC_CR1_SCAN;
ADC1->CR2 |= ADC_CR2_TSVREFE
          |  ADC_CR2_DMA
          |  ADC_CR2_CONT;
ADC1->SMPR1 = 0x001FFFFF;
ADC1->SMPR2 = 0x3FFFFFFF;
ADC1->SQR3 = ( 0 * ADC_SQR3_SQ1_0)
           | ( 3 * ADC_SQR3_SQ2_0)
           | ( 5 * ADC_SQR3_SQ3_0)
           | ( 8 * ADC_SQR3_SQ4_0)
           | ( 9 * ADC_SQR3_SQ5_0)
           | (10 * ADC_SQR3_SQ6_0);
ADC1->SQR2 = (12 * ADC_SQR2_SQ7_0)
           | (13 * ADC_SQR2_SQ8_0)
           | (17 * ADC_SQR2_SQ9_0);
ADC1->SQR1 = (ADC_NCH - 1) * ADC_SQR1_L_0;
ADC1->CR2 |= ADC_CR2_ADON;