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Evgeny_CD (05.09.2005 18:12, просмотров: 37) в ответ на Лично я жду к концу года 64К. Не далее как сегодня мне позвонили и сообщили, что анонсированы (вроде доступны образцы) 32K и 48K. - автор: General
А мы лучше STR91xF от ST подождем ■ 16/32-bit 96 MHz ARM9E based MCU – ARM966E-S RISC core: Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash) – STR91xF implementation of core adds highspeed burst Flash memory interface, instruction prefetch queue, branch cache – Up to 80 MIPS directly from Flash memory – Single-cycle DSP instructions are supported – Binary compatible with 16/32-bit ARM7 code ■ Dual Burst Flash Memories, 32-bits wide – 256KB/512KB Main Flash, 32KB 2nd Flash – Sequential Burst operation up to 75 MHz – 100K min erase cycles, 20 yr min retention ■ SRAM, 32-bits wide – 64K or 96K bytes, optional battery backup ■ 9 Programmable DMA channels – One for Ethernet, eight programmable chnls ■ Clock, Reset, and Supply Management – 4-25MHz external, internal PLL to 96 MHz – Real-time clock provides calendar functions, tamper detection, and wake-up functions – Reset Supervisor monitors voltage supplies, watchdog timer, wake-up unit, ext. reset – Brown-out monitor for early warning interrupt – Run, Idle, and Sleep Mode as low as 50 uA ■ Vectored Interrupt Controller (VIC) – 32 IRQ vectors, 30 intr pins, any can be FIQ – Branch cache minimizes interrupt latency ■ 8-channel, 10-bit A/D Converter (ADC) – 0 to 3.6V range, 2 usec conversion time ■ 11 Communication Interfaces – 10/100 Ethernet MAC with DMA and MII port – USB 2.0 Full Speed (12 Mbps) slave device – CAN interface (2.0B Active) – 3 16550-style UARTs with IrDA protocol – 2 Fast I2C™, 400 kHz – 2 channels for SPI™, SSI™, or Microwire™ – 8/16-bit EMI bus on 128 pin packages ■ Up to 80 I/O pins (muxed with interfaces) – 5V tolerant, 16 have high sink current (8mA) – Bit-wise manipulation of pins within a port ■ 16-bit Standard Timers (TIM) – 4 timers each with 2 input capture, 2 output compare, PWM and pulse count modes ■ 3-Phase Induction Motor Controller (IMC) – 3 pairs of PWM outputs, adjustable centers – Emergency stop, dead-time gen, tach input ■ JTAG Interface with Boundary Scan – ARM EmbeddedICE® RT for debugging – In-System Programming (ISP) of Flash ■ Embedded Trace Module (ARM ETM9) – Hi-speed instruction tracing, 9-pin interface
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