ARM, RISC-V контроллеры

Убрал отключение оптимизации Осталось ;;;217 result_TR55 = count_err; 000076 9100 STR r1,[sp,#0] И да, он фактически кладет счетчик по этому адресу в ОЗУ. ;;;166 void RamTest(void) 000000 b50f PUSH {r0-r3,lr} ;;;167 { ;;;168 register uint32_t addres_ram; ;;;169 register uint32_t count_err; ;;;170 ;;;171 register volatile uint32_t result_T1; ;;;172 register volatile uint32_t result_T0; ;;;173 register volatile uint32_t result_TRAA; ;;;174 register volatile uint32_t result_TR55; ;;;175 ;;;176 // #pragma push ;;;177 // #pragma O0 ;;;178 // #pragma Otime ;;;179 ;;;180 for (addres_ram = STRT_ADDR_RAM; addres_ram < STRT_ADDR_RAM + SIZE_RAM; addres_ram++) 000002 f04f5000 MOV r0,#0x20000000 000006 e002 B |L1.14| |L1.8| ;;;181 { ;;;182 *(__IO uint8_t*)addres_ram = 0x00; 000008 2200 MOVS r2,#0 00000a 7002 STRB r2,[r0,#0] 00000c 1c40 ADDS r0,r0,#1 ;180 |L1.14| 00000e 4a25 LDR r2,|L1.164| 000010 4290 CMP r0,r2 ;180 000012 d3f9 BCC |L1.8| ;;;183 } ;;;184 for (addres_ram = STRT_ADDR_RAM; addres_ram < STRT_ADDR_RAM + SIZE_RAM; addres_ram++) 000014 03d0 LSLS r0,r2,#15 000016 e003 B |L1.32| |L1.24| ;;;185 { ;;;186 if ((*(__IO uint8_t*)addres_ram) != 0x00){ 000018 7802 LDRB r2,[r0,#0] 00001a b102 CBZ r2,|L1.30| ;;;187 count_err++; 00001c 1c49 ADDS r1,r1,#1 |L1.30| 00001e 1c40 ADDS r0,r0,#1 ;184 |L1.32| 000020 4a20 LDR r2,|L1.164| 000022 4290 CMP r0,r2 ;184 000024 d3f8 BCC |L1.24| ;;;188 } ;;;189 } ;;;190 result_T0 = count_err; 000026 9102 STR r1,[sp,#8] ;;;191 count_err = 0; 000028 2100 MOVS r1,#0 ;;;192 ;;;193 for (addres_ram = STRT_ADDR_RAM; addres_ram < STRT_ADDR_RAM + SIZE_RAM; addres_ram++) 00002a 03d0 LSLS r0,r2,#15 00002c e002 B |L1.52| |L1.46| ;;;194 { ;;;195 *(__IO uint8_t*)addres_ram = 0xFF; 00002e 22ff MOVS r2,#0xff 000030 7002 STRB r2,[r0,#0] 000032 1c40 ADDS r0,r0,#1 ;193 |L1.52| 000034 4a1b LDR r2,|L1.164| 000036 4290 CMP r0,r2 ;193 000038 d3f9 BCC |L1.46| ;;;196 } ;;;197 for (addres_ram = STRT_ADDR_RAM; addres_ram < STRT_ADDR_RAM + SIZE_RAM; addres_ram++) 00003a 03d0 LSLS r0,r2,#15 00003c e004 B |L1.72| |L1.62| ;;;198 { ;;;199 if ((*(__IO uint8_t*)addres_ram) != 0xFF){ 00003e 7802 LDRB r2,[r0,#0] 000040 2aff CMP r2,#0xff 000042 d000 BEQ |L1.70| ;;;200 count_err++; 000044 1c49 ADDS r1,r1,#1 |L1.70| 000046 1c40 ADDS r0,r0,#1 ;197 |L1.72| 000048 4a16 LDR r2,|L1.164| 00004a 4290 CMP r0,r2 ;197 00004c d3f7 BCC |L1.62| ;;;201 } ;;;202 } ;;;203 result_T1 = count_err; 00004e 9103 STR r1,[sp,#0xc] ;;;204 count_err = 0; 000050 2100 MOVS r1,#0 ;;;205 ;;;206 for (addres_ram = STRT_ADDR_RAM; addres_ram < STRT_ADDR_RAM + SIZE_RAM; addres_ram++) 000052 03d0 LSLS r0,r2,#15 000054 e002 B |L1.92| |L1.86| ;;;207 { ;;;208 *(__IO uint8_t*)addres_ram = 0x55; 000056 2255 MOVS r2,#0x55 000058 7002 STRB r2,[r0,#0] 00005a 1c40 ADDS r0,r0,#1 ;206 |L1.92| 00005c 4a11 LDR r2,|L1.164| 00005e 4290 CMP r0,r2 ;206 000060 d3f9 BCC |L1.86| ;;;209 } ;;;210 ;;;211 for (addres_ram = STRT_ADDR_RAM; addres_ram < STRT_ADDR_RAM + SIZE_RAM; addres_ram++) 000062 03d0 LSLS r0,r2,#15 000064 e004 B |L1.112| |L1.102| ;;;212 { ;;;213 if ((*(__IO uint8_t*)addres_ram) != 0x56){ 000066 7802 LDRB r2,[r0,#0] 000068 2a56 CMP r2,#0x56 00006a d000 BEQ |L1.110| ;;;214 count_err++; 00006c 1c49 ADDS r1,r1,#1 |L1.110| 00006e 1c40 ADDS r0,r0,#1 ;211 |L1.112| 000070 4a0c LDR r2,|L1.164| 000072 4290 CMP r0,r2 ;211 000074 d3f7 BCC |L1.102| ;;;215 } ;;;216 } ;;;217 result_TR55 = count_err; 000076 9100 STR r1,[sp,#0] ;;;218 count_err = 0; 000078 2100 MOVS r1,#0 ;;;219 ;;;220 ;;;221 for (addres_ram = STRT_ADDR_RAM; addres_ram < STRT_ADDR_RAM + SIZE_RAM; addres_ram++) 00007a 03d0 LSLS r0,r2,#15 00007c e002 B |L1.132| |L1.126| ;;;222 { ;;;223 *(__IO uint8_t*)addres_ram = 0xAA; 00007e 22aa MOVS r2,#0xaa 000080 7002 STRB r2,[r0,#0] 000082 1c40 ADDS r0,r0,#1 ;221 |L1.132| 000084 4a07 LDR r2,|L1.164| 000086 4290 CMP r0,r2 ;221 000088 d3f9 BCC |L1.126| ;;;224 } ;;;225 for (addres_ram = STRT_ADDR_RAM; addres_ram < STRT_ADDR_RAM + SIZE_RAM; addres_ram++) 00008a 03d0 LSLS r0,r2,#15 00008c e004 B |L1.152| |L1.142| ;;;226 { ;;;227 if ((*(__IO uint8_t*)addres_ram) != 0xAA){ 00008e 7802 LDRB r2,[r0,#0] 000090 2aaa CMP r2,#0xaa 000092 d000 BEQ |L1.150| ;;;228 count_err++; 000094 1c49 ADDS r1,r1,#1 |L1.150| 000096 1c40 ADDS r0,r0,#1 ;225 |L1.152| 000098 4a02 LDR r2,|L1.164| 00009a 4290 CMP r0,r2 ;225 00009c d3f7 BCC |L1.142| ;;;229 } ;;;230 } ;;;231 result_TRAA = count_err; 00009e 9101 STR r1,[sp,#4] ;;;232 count_err = 0; 0000a0 2100 MOVS r1,#0 ;;;233 ;;;234 // #pragma pop ;;;235 } 0000a2 bd0f POP {r0-r3,pc}