ARM, RISC-V контроллеры

RL78-S3 core есть, RL78-S1 и RL78-S2 нет The following multiply/divide/multiply & accumulate instructions are expanded instructions and mounted only on the RL78-S3 core. For details, refer to user’s manual of each product.  MULHU (16-bit multiplication unsigned)  MULH (16-bit multiplication signed)  DIVHU (16-bit division unsigned) - 9 тактов  DIVWU (32-bit division unsigned) - 17 тактов.  MACHU (16-bit multiplication and accumulation unsigned (16 bits × 16 bits) + 32 bits)  MACH (16-bit multiplication and accumulation signed (16 bits × 16 bits) + 32 bits)