Микроконтроллеры PIC

Ровно 10 (ДЕСЯТЬ, Карл!!!) секунд потребовалось на копипасту размера FIFO UART-а, хотя размер следует из схемы в самом начале описания UART. Кстати, у передатчика такой же, как и у приемника.

34.2.2 UART Asynchronous Receiver The Asynchronous mode is typically used in RS-232 systems. The receiver block diagram is shown in Figure 34-2. The data is received on the RX pin and drives the data recovery block. The data recovery block is actually a highspeed shifter operating at 4 or 16 times the baud rate, whereas the serial Receive Shift Register (RSR) operates at the bit rate. When all bits of the character have been shifted in, they are immediately transferred to a two-character First-In First-Out (FIFO) memory. The FIFO buffering allows reception of two complete characters and the start of a third character before software must begin servicing the UART receiver. The FIFO registers and RSR are not directly accessible by software. Access to the received data is made via the UxRXB register.